**2 Level Logic Diagram**- digital circuits two level logic realization the maximum number of levels that are present between inputs and output is two in two level logic that means irrespective of total number of logic gates the two level logic means that the logic design uses maximum two logic gates between input and output this does not mean that the whole design will contain only two logic gates but the single path from input to output may contain no more than two logic gates 2 1 logic functions and switches in chapter 1 you saw that at least some boolean expressions can be represented by logic gates and vice versa actually all boolean functions can be implemented in terms of and or and not gates 2 level logic diagram a programmable logic controller plc or programmable controller is an industrial digital puter which has been ruggedized and adapted for the control of manufacturing processes such as assembly lines.

or robotic devices or any activity that requires high reliability control and ease of programming and process fault general concept conceptually an aoi logic block is a three level logic circuit consisting of and gates at the first level an or gate at the second level and an inverter at the output similarly an oai block has or gates at the first level an and gate at the second level and an inverter at the third level 2 level logic in binary logic the two levels are logical high and logical low which generally correspond to binary numbers 1 and 0 respectively signals with one of these two levels can be used in boolean algebra for digital circuit design or analysis active state the use of either the higher or the lower voltage level to represent either logic state is arbitrary the logic symbols jpq and can be used to denote xor in algebraic expressions c like languages use the caret symbol.

to denote bitwise xor note that the caret does not denote logical conjunction and in these languages despite the similarity of symbol pass gate logic wiring an xor gate can be constructed using mosfets here is a diagram of a pass transistor logic